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About the seminar
The talk will review the early years of VLSI systems and the competition between low density high performance chips and high density low performance chips.
Silicon compilers in various forms from gate arrays to Mead and Conway structured design will be reviewed.
The evolution of silicon processes along with Hardware Description Languages will be described and how these lead to the demise of power hungry circuits and to high productivity design for complex chips.
About the speaker
John had an engineering career in ICL, in the High Performance Systems division at West Gorton in Manchester. John was the Senior Technologist for the Office Mainframe Project (DM1).